Sumários

AXI bus

8 maio 2019, 15:30 Horácio Neto

Advanced eXtensible Interface (AXI) bus.
Basic AXI Transactions. AXI-Full, AXI-Lite and AXI-Stream Signals.
AXI Interconnect block.
AXI-Full vs. AXI-Lite vs. AXI-Stream.


Final Project (1)

3 maio 2019, 15:30 Horácio Neto

Design of heterogeneous multiprocessor system.


Architectures for PL Accelerators

3 maio 2019, 14:00 Horácio Neto

A multi-processor for cluster analysis - design example 1.
K-means clustering application.
Architecture, processing elements and data movements.
Implementation, resource utilization and performance analysis.

Multi-processor for sparse matrix applications - design example 2.
Architecture, processing elements and data movements.
Implementation, resource utilization and performance analysis.

A HW/SW architecture for equation solving by Jacobi iteration algorithm - example 3.
A HW/SW architecture for kNN classification - example 4.


HW / SW co-processing architecture (5)

26 abril 2019, 15:30 Horácio Neto

Design and implementation of an embedded system with a uniprocessor and an hardware accelerator.


Support to Project Demonstration

26 abril 2019, 14:00 Horácio Neto

Support to the completion of the first project (in LSD2).