Sumários
Lab 6: Classwork
5 janeiro 2024, 11:30 • Aleksandar Ilic
Consolidate and develop a better understanding of caches, by using the Ripes simulator. Analysis of the memory access pattern of a real code for different data cache configurations.
Lab 6: Classwork
5 janeiro 2024, 10:00 • Aleksandar Ilic
Consolidate and develop a better understanding of caches, by using the Ripes simulator. Analysis of the memory access pattern of a real code for different data cache configurations.
Lab 6: Classwork
5 janeiro 2024, 08:30 • Aleksandar Ilic
Consolidate and develop a better understanding of caches, by using the Ripes simulator. Analysis of the memory access pattern of a real code for different data cache configurations.
Modern Processors (to a decimal point)
4 janeiro 2024, 16:00 • Aleksandar Ilic
Fixed point number representation and arithmetic operations, Floating-point (FP) representation (IEEE-754 Standard), FP conversion arithmetic operations, and rounding modes; RISC-V FP extension; Other FP representations; Modern processor architectures: deeper and wider pipelines, superscalar, out-of-order and speculative execution, branch prediction: static/dynamic, branch target buffer
Virtual Memory and How Memory Works
21 dezembro 2023, 16:00 • Aleksandar Ilic
Virtual and physical address spaces, segmentation, paging, address translation: single-level and hierarchical page tables, demand paging, page table entry, page faults, TLB, virtual memory performance, examples
How memory works: DRAM cell, array, bank, DIMM, memory channels; accessing DRAM: read and write operations;