Sumários
HW / SW co-processing architecture
14 março 2018, 17:00 • Horácio Neto
Design and implementation of an embedded system with a uniprocessor and an hardware accelerator.
Basic Hardware Architecture
14 março 2018, 15:30 • Horácio Neto
Register-Transfer Level Methodology
FSMD = control unit + datapath
Algorithm to hardware: direct “dataflow” implementation, datapath with shared operators.
Introduction to the the Vivado Design Suite (2)
9 março 2018, 15:30 • Horácio Neto
Introduction to the the Vivado Design Suite (cont.)
Custom HW components
9 março 2018, 14:00 • Horácio Neto
Codesign Development
Amdahl's law and Hardware Speedup
HW/SW Communication
Performance Comparisons
Stream-Based Interfaces
Introduction to the the Vivado Design Suite (2)
7 março 2018, 17:00 • Horácio Neto
Introduction to the the Vivado Design Suite (cont.)