Sumários
Direct Memory Access
15 abril 2016, 14:00 • Horácio Neto
Using Direct Memory Access to data shared between SW and HW.
AXI DMA IP.
Connecting the AXI-Stream HW IP.
Example Application.
HW / SW co-processing architecture (4)
13 abril 2016, 17:00 • Horácio Neto
Design and implementation of an embedded system with a uniprocessor and an hardware accelerator.
AXI-Stream matrix product IP design example
13 abril 2016, 15:30 • Horácio Neto
IP AXI-Stream Component.
3-States control FSM.
Memory and Datapath.
Interface Signals.
HW / SW co-processing architecture (3)
8 abril 2016, 15:30 • Horácio Neto
Design and implementation of an embedded system with a uniprocessor and an hardware accelerator.
AXI4-Lite vs. AXI-Stream
8 abril 2016, 14:00 • Horácio Neto
AXI-Stream FIFO.
AXI-Lite Signals. AXI-Stream Signals.
AXI-Stream IP design using Vivado wizard.