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Prova de Tópicos de Investigação

19 janeiro 2018, 17:57 - Fátima Sampaio


Candidate: Pedro Luís Galvão Raminhas N.º 70627/D

Title: Enhancing efficiency of Hybrid Transactional Memory via Dynamic Data Partitioning Schemes

Date: 23/01/2018

Time: 16h00

Location: Sala 0.20, Pavilhão de Informática II, IST, Alameda

Advisor: Professor Paolo Romano 

Abstract: Transactional Memory (TM) is an emerging paradigm that promises to significantly ease the development of parallel programs. Hybrid TM (HyTM) is probably the most promising implementation of the TM abstraction, which seeks to combine the high efficiency of hardware implementations (HTM) with the robustness and flexibility of software-based ones (STM). Unfortunately, though, existing Hybrid TM systems are known to suffer from high overheads to guarantee correct synchronization between concurrent transactions executing in hardware and software.This article introduces DMP-TM (Dynamic Memory Partitioning-TM), a novel HyTM algorithm that exploits, to the best of our knowledge for the first time in the literature, the idea of leveraging operating system-level memory protection mechanisms to detect conflict between HTM and STM transactions. This innovative design allows for employing highly scalable ORec-based STM implementations, while avoiding any instrumentation on the HTM path.This allows DMP-TM to achieve up to ∼ 20× speedups compared to state of the art Hybrid TM solutions in uncontended workloads. Further, thanks to the use of simple and lightweight self-tuning mechanisms, DMP-TM achieves robust performance even in unfavourable workload that exhibit high contention between the STM and HTM path."